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Testing Startup Constructors

November 19, 2022 (toolchain,baremetal,C,C++)

There were a few bugs in the code examples that have been fixed.

The loop in startup.c function _startup() that calling each entry from __init_array_start to __init_array_end was incorrect in Startup Code in C and Startup Code in C++. It has been fixed and tested.

To test it the main.c routine was updated to demonstrate the operation of the contructors called in _startup() before main() is called.

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Example for VCD Tracing of RISC-V Software

September 04, 2022 (toolchain,vcd,simulation,debugging,tracing,baremetal,C)

In the previous post I added a fork of the RISC-V ISA simulator. In this post you can see how it can be used.

The source code for this example is on github, here: https://github.com/five-embeddev/riscv-scratchpad/tree/master/baremetal-vcd-trace.

This small program handles the mie, msi, mti and trap interrupts and updates some global variables when interrupts occur.


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Baremetal Example Updates

September 01, 2022 (toolchain,baremetal,C,csr,registers,cmake)

Updates have been made to the baremetal examples.

CMake Updates

  • The CMake file can now find riscv-none-elf-gcc as the xpack GCC executable has been renamed to riscv-none-elf-*.
  • Recent GCCs/binutils require the zicsr extension to be specified in -march to use CSR instructions.

Code Updates

  • Updated CSR access templates to test for zicsr extension.
  • Updated the CSR access header for the Baremetal C examples.
  • Fixed the CMakeLists.txt files to include -march=rv32imac_zicsr.
  • Updated the timer.h to allow USEC/MSEC intervals and different timer frequencies.
  • Added the baremetal-vcd-trace example.

Example Bugs!

March 06, 2022 (toolchain,baremetal,C)

There were a few bugs in the code examples that have been fixed.

  • Global pointer needs to be written with norelax option set. (See quickref: Global Pointer)
  • For C++ the argument order to std::copy() was incorrect. (it matched memcpy() … target, source)

Baremetal Vectored Interrupts in C for RISC-V

September 25, 2021 (articles,baremetal,C)

An example of using vectored interrupts in C.

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Baremetal Timer Driver in C for RISC-V

September 24, 2021 (articles,baremetal,C)

An example of a timer driver in C has been added.

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Baremetal Startup in C for RISC-V

September 24, 2021 (articles,baremetal,C)

An example of a startup code in C.

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Baremetal Timer Driver in C++ for RISC-V

August 13, 2021 (articles,baremetal,C++)

An example of a timer driver.

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Baremetal Interrupt in C++ for RISC-V

August 13, 2021 (articles,baremetal,C++)

An example of using interrupts.

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Baremetal Startup Code in C++ for RISC-V

April 13, 2021 (toolchain,baremetal,C++)

An example of baremetal bootstrap code for RISC-V in C++.

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RISC-V CSR Access

November 18, 2020 (registers,code,baremetal,quickref)

For baremetal programming I’ll often need to access CSRs, e.g. mstatus.mie for critical sections, mcause in interrupts handlers, etc. Defining function wrappers for accessing these registers creates easier to understand code, however writing these wrappers is pretty tedious.

The quick reference on this blog is generated from a YAML description (csr.yaml). Using that with a web template engine script (generators/yaml_jinja.py) and a template (templates/riscv-csr.h) code can be easily generated.

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