RISC-V Instruction Set Manual, Volume I: RISC-V User-Level ISA
, Priv-v1.12
2021/12/03
20 “P” Standard Extension for Packed-SIMD Instructions,
Version 0.2
Discussions at the 5th RISC-V workshop indicated a desire to drop
this packed-SIMD proposal for floating-point registers in favor of
standardizing on the V extension for large floating-point SIMD
operations. However, there was interest in packed-SIMD fixed-point
operations for use in the integer registers of small RISC-V
implementations. A task group is working to define the new P
extension.
Five EmbedDev
Discussions at the 5th RISC-V workshop indicated a desire to drop this packed-SIMD proposal for floating-point registers in favor of standardizing on the V extension for large floating-point SIMD operations. However, there was interest in packed-SIMD fixed-point operations for use in the integer registers of small RISC-V implementations. A task group is working to define the new P extension.