Five EmbedDev logo Five EmbedDev

An Embedded RISC-V Blog
RISC-V Instruction Set Manual, Volume I: RISC-V User-Level ISA , isa-449cd0c 2023/04/18

21 “V” Standard Extension for Vector Operations, Version 1.0

This specification is currently hosted at https://github.com/riscv/riscv-v-spec.

The base vector extension is intended to provide general support for data-parallel execution within the 32-bit instruction encoding space, with later vector extensions supporting richer functionality for certain domains.