The RISC-V Foundation publish the official specification.

• Online viewer: https://riscv.org/specifications/
• GitHub source: https://github.com/riscv/riscv-isa-manual

These are un-official conversions to HTML from the GitHub source (There is an effort to do it officially here):

• User ISA
• Privileged ISA
• Vector Extension
• External Debug
• Bit-manipulation

ABI References from the RISC-V GitHub:

• Standard ABI: https://github.com/riscv-non-isa/riscv-elf-psabi-doc/Calling Convention
• Embedded EABI: https://github.com/riscv-non-isa/riscv-eabi-spec/blob/master/EABI.adoc

Machine Readable Resources:

• RISC-V official opcodes is available on RISC-V GitHub: https://github.com/riscv/riscv-opcodes
• YAML ISA data used for this blog: https://github.com/five-embeddev/riscv-isa-data
• See also the Machine Readable Data Quick Reference page.