I’ve setup this this blog to capture information I’ve found useful to develop RISC-V embedded firmware.

My experience is with bare metal RV32EC based systems. Previously I have worked with ARM Cortex-M0 and other processors, so initially I’ll capture the information needed to bootstrap such firmware and the gotchas that come from not yet thinking in RISC-V terms.

Some of the initial planned material is:

• ISA information presented as easy to reference HTML.
• Low level information for getting started with the RISC-V architecture.
• Some evaluation of how RISC-V compares to other architectures.