Access Register
[access register]
This command gives the debugger access to CPU registers and allows it to execute the Program Buffer. It performs the following sequence of operations:
If writeis clear and transferis set, then copy data from
the register specified by regnointo the arg0 region of
data, and perform any side effects that occur when this
register is read from M-mode.
If writeis set and transferis set, then copy data from the
arg0 region of data into the register specified by
regno, and perform any side effects that occur when this register
is written from M-mode.
If aarpostincrementis set, increment regno.
Execute the Program Buffer, if postexecis set.
If any of these operations fail, cmderris set and none of the
remaining steps are executed. An implementation may detect an upcoming
failure early, and fail the overall command before it reaches the step
that would cause failure. If the failure is that the requested register
does not exist in the hart, cmderrmust be set to 3 (exception).
Debug Modules must implement this command and must support read and write access to all GPRs when the selected hart is halted. Debug Modules may optionally support accessing other registers, or accessing registers when the hart is running. Each individual register (aside from GPRs) may be supported differently across read, write, and halt status.
This command modifies arg0 only when a register is read. The
other data registers are not changed.
| Field | Description |
|---|---|
| [cmdtype] |cmdtype| | This is 0 to indicate Access Register Command. |
| [aarsize] |aarsize| | 2: Access the lowest 32 bits of the register. 3: Access the lowest 64 bits of the register. 4: Access the lowest 128 bits of the register. If This field controls the Argument Width as referenced in Table [tab:datareg]. |
| [aarpostincrement] |aarpostincrement| | 0: No effect. This variant must be supported. 1: After a successful register access, |
| [postexec] |postexec| | 0: No effect. This variant must be supported, and is the only
supported one if 1: Execute the program in the Program Buffer exactly once after performing the transfer, if any. Supporting this variant is optional. |
| [transfer] |transfer| | 0: Don’t do the operation specified by 1: Do the operation specified by This bit can be used to just execute the Program Buffer without
having to worry about placing valid values into |
| [write] |write| | When 1: Copy data from |
| [regno] |regno| | Number of the register to access, as described in
Table 1.
dpcmay be used as an alias for PC if this command is
supported on a non-halted hart. |
Quick Access
[quick access]
Perform the following sequence of operations:
If the hart is halted, the command sets cmderrto “halt/resume” and does not continue.
Halt the hart. If the hart halts for some other reason (e.g. breakpoint), the command
sets cmderrto “halt/resume” and does not continue.
Execute the Program Buffer. If an exception occurs, cmderris set to “exception”
and the program buffer execution ends, but the quick access command continues.
Resume the hart.
Implementing this command is optional.
This command does not touch the data registers.
| Field | Description |
|---|---|
| [cmdtype] |cmdtype| | This is 1 to indicate Quick Access command. |
Access Memory
[access memory]
This command lets the debugger perform memory accesses, with the exact same memory view and permissions as the selected hart has. This includes access to hart-local memory-mapped registers, etc. The command performs the following sequence of operations:
Copy data from the memory location specified in arg1 into the
arg0 portion of data, if writeis clear.
Copy data from the arg0 portion of data into the
memory location specified in arg1, if writeis set.
If aampostincrementis set, increment arg1.
If any of these operations fail, cmderris set and none of the
remaining steps are executed. An access may only fail if the hart,
running M-mode code, might encounter that same failure when it attempts
the same access.
An implementation may detect an upcoming
failure early, and fail the overall command before it reaches the step
that would cause failure.
Debug Modules may optionally implement this command and may support read and write access to memory locations when the selected hart is running or halted. If this command supports memory accesses while the hart is running, it must also support memory accesses while the hart is halted.
The encoding of aamsizewas chosen to match sbaccessin sbcs.
This command modifies arg0 only when memory is read. It modifies
arg1 only if aampostincrementis set. The other data
registers are not changed.
| Field | Description |
|---|---|
| [cmdtype] |cmdtype| | This is 2 to indicate Access Memory Command. |
| [aamvirtual] |aamvirtual| | An implementation does not have to implement both virtual and physical accesses, but it must fail accesses that it doesn’t support. 0: Addresses are physical (to the hart they are performed on). 1: Addresses are virtual, and translated the way they would be from M-mode, with set. |
| [aamsize] |aamsize| | 0: Access the lowest 8 bits of the memory location. 1: Access the lowest 16 bits of the memory location. 2: Access the lowest 32 bits of the memory location. 3: Access the lowest 64 bits of the memory location. 4: Access the lowest 128 bits of the memory location. |
| [aampostincrement] |aampostincrement| | After a memory access has completed, if this bit is 1, increment
arg1 (which contains the address used) by the number of bytes
encoded in aamsize. |
| [write] |write| | 0: Copy data from the memory location specified in 1: Copy data from |
| [target-specific] |target-specific| | These bits are reserved for target-specific uses. |
The encoding of
aarsizewas chosen to matchsbaccessinsbcs.